Panels


Panelist at the Trusted and Assured MicroElectronics (TAME) Forum on “Need for National Technology Roadmap for Trusted and Assured Microelectronics”, November 29, 2017.
Panelist on Monday panel at International Test Conference (ITC) on “Automotive Safety and Security: The Impending Challenges and Hopes on the Horizon”, October 30, 2017.
Panelist of a panel in on "Foundations of Secure Scaling: System Integration Challenges and Solutions", Dagstuhl Seminar 16342, Schloss Dagstuhl - Leibniz-Zentrum für Informatik GmbH, Germany, Aug 21-26, 2016.
Moderator of a panel on "Test Opportunities for Secure Hardware", IEEE VLSI Test Symposium (VTS), Las Vegas, USA, April 24-27, 2016.
Panelist of a panel on "DFT vs. Security – Is it a Contradiction? How Can We Get the Best of Both Worlds", The 1st IEEE International Verification and Security Workshop (IVSW), Catalunya, Spain, July 4-6, 2016.
Organizer and Moderator of a panel on "IoT Security: Issues, Innovations and Interplays", GLSVLSI, Boston, USA, May 18-20, 2016.
Panelist in the panel on "Hardware Security: Is it a Myth or Reality?", 18th ACM/IEEE System Level Interconnect Prediction 2016 workshop , Austin, USA, June 5-9, 2016.
Moderator in a panel on "Cybersecurity Metrics and Standards", FICS Annual Conference on Cybersecurity, February 9-10, 2016.
Panelist in the Panel on "Capabilities and Gaps" in Systems Security,  NSF-SRC Secure, Trustworthy, Assured and Resilient Semiconductors and Systems (STARSS) Workshop, San Jose, USA, May 2014
Panelist in the Panel on "Teaching Cyber-Security in STEM Curriculums: K though PhD",  7th IEEE International Symposium on Hardware-Oriented Security and Trust (HOST), Washington DC, USA, May 2014
Panelist in the Panel on "Hackers Not Welcomed - Security Verification Issues",  14th International Workshop on Microprocessor Test and Verification (MTV), Austin, USA, December 2013
Organizer of the Panel on "What Lies in Our (Nanoelectronic) Future?",  9th IEEE/ACM International Symposium on Nanoscale Architecture (NANOARCH), July 2013
Panelist in the Panel on "CAD for Nanoelectronic Circuit and Architecture - Are we there yet",  6th IEEE/ACM International Symposium on Nanoscale Architecture (NANOARCH), June 2010
Panelist in the Panel on "Challenges in Hardware Trojan Modeling and Detection",  3rd IEEE Hardware Oriented Security and Trust (HOST), June 2010