|
|
Hardware Security and Trust
| Recent Publications on "Hardware Security and Trust" | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| Jonathan Cruz, Prabhat Mishra, and Swarup Bhunia, “The Metric Matters: The Art of Measuring Trust in Electronics", to appear in Design Automation Conference (DAC), Las Vegas, NV, USA, June 2019. [Special Session on “In CAD We Trust? The Question that Drives Trusted Microelectronics”] | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| Nagmeh Karimi, Jeyavijayan Rajendran, Hassan Salmani, Tamzidul Hoque, and Swarup Bhunia, “Countering IP Security threats in Supply chain", to appear in IEEE VLSI Test Symposium (VTS), Monterey, CA, USA, April 2019. [Special Session on Hardware IP Security] | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| Prabuddha Chakraborty, Jonathan Cruz, and Swarup Bhunia, “SURF: Joint Structural Functional Attack on Logic Locking”, to appear in 12th IEEE Hardware Oriented Security and Trust (HOST), McLean, VA, USA, May 6 - 10, 2019. | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| Ahish Shylendra, Swarup Bhunia, and Amit Trivedi, “An Intrinsic and Database-free Authentication by Exploiting Process Variation in Back-end Capacitors”, to appear in IEEE Transactions on Very Large Scale Integration Systems. | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| Indrani Roy, Chester Rebeiro, Aritra Hazra, and Swarup Bhunia, “SAFARI: Automatic Synthesis of Fault-Attack Resistant Block Cipher Implementations”, to appear in IEEE Transactions on CAD of Integrated Circuits and Systems (TCAD). | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| Abdulrahman Alaql, Tamzidul Hoque, Domenic Forte, Swarup Bhunia, “Quality Obfuscation for Reliable and Adaptive Hardware IP Protection”, to appear in 37th IEEE VLSI Test Symposium (VTS), Monterey, CA, USA, April 23 - 25, 2019. | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| Atul Prasad Debnath, Srivalli Boddupalli, Swarup Bhunia, and Sandip Ray, “ARK: Architecture for Security Resiliency in SoC Designs with NetworK-on-Chip (NoC) Fabrics”, to appear in GOMACTech-19 Conference, Albuquerque, NM, USA, March 25 - 28, 2019. | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| Prabuddha Chakraborty, Jonathan Cruz, and Swarup Bhunia, “SAIL: Machine Learning Guided Structural Analysis Attack on Hardware Obfuscation”, to appear in 3rd Asian Hardware Oriented Security and Trust Symposium (AsianHOST), Hong Kong, Dec 17 - 18, 2018. | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| Tamzidul Hoque, Jonathan Cruz, Prabuddha Chakraborty, and Swarup Bhunia, “Hardware IP Trust Validation: Learn (the Untrustworthy), and Verify”, to appear in 49th International Test Conference (ITC), Phoenix, AZ, USA, Oct 26 - Nov 1, 2018. | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| Naren Vikram Raj Masna, Cheng Chen, Soumyajit Mandal, and Swarup Bhunia, “Authentication of Dietary Supplements through Nuclear Quadrupole Resonance (NQR) Spectroscopy”, to appear in International Journal of Food Science and Technology (IJFST). | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| Haoting Shen, Mark Tehranipoor, and Swarup Bhunia, “Tampering, Snooping, and Electromagnetic Attack Proof Coating on Printed Circuit Boards”, to appear in 44th International Symposium for Testing and Failure Analysis (ISTFA), Phoenix, AZ, USA, Oct 26 - Nov 1, 2018. | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| Naren Vikram Raj Masna, Shubhra Deb Paul, Cheng Chen, Soumyajit Mandal, and Swarup Bhunia, “Eat, but Verify: Low-Cost Portable Devices for Food Safety Analysis”, to appear in IEEE Consumer Electronics Magazine (CEM). | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| Kai Yang, Jungmin Park, Mark Tehranipoor, and Swarup Bhunia, “Robust Timing Attack Countermeasure on Virtual Hardware”, to appear in IEEE Computer Society Annyal Symposium on VLSI (ISVLSI), Hong Kong SAR, China, July 9-11, 2018. | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| Atul Prasad Debnath, Swarup Bhunia, and Sandip Ray, “ArtiFact: Architecture and CAD Flow for Ef?cient Formal Veri?cation of SoC Security Policies”, to appear in IEEE Computer Society Annyal Symposium on VLSI (ISVLSI), Hong Kong SAR, China, July 9-11, 2018. | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| Ahish Shylendra, Swarup Bhunia, and Amit Ranjan Trivedi, “Intrinsic and Database-free Watermarking in ICs by Exploiting Process and Design Dependent Variability in Metal-Oxide-Metal Capacitances”, to appear in ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED), 2018 [Poster Presentation]. | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| Yuanwen Huang, Swarup Bhunia, and Prabhat Mishra, “Scalable Test Generation for Trojan Detection using Side Channel Analysis”, to appear in IEEE Transactions on Information Forensics & Security (TIFS). | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Sarah Amir, Bicky Shakya, Xiaolin Xu, Yier Jin, Swarup Bhunia, Mark Tehranipoor, and Domenic Forte,
“Development and Evaluation of Hardware Obfuscation Benchmarks”, to appear in Journal of Hardware and Systems Security (HaSS).
|
Kai Yang, Jungmin Park, Mark Tehranipoor, and Swarup Bhunia, “Hardware Virtualization for Protection against Power Analysis Attack”,
to appear in 11th IEEE Hardware Oriented Security and Trust (HOST), Washington DC, April 30 - May 4, 2018 [Poster Presentation].
|
Tamzidul Hoque, Xinmu Wang, Abhishek Basak, Robert Karam, and Swarup Bhunia, “Hardware Trojan Attack in Embedded Memory”,
to appear in IEEE VLSI Test Symposium (VTS), San Francisco, April 22 - 25, 2018.
|
Jonathan Cruz, Yuanwen Huang, Prabhat Mishra and Swarup Bhunia, “An Automated Configurable Trojan Insertion Framework for Dynamic Trust Benchmarks”,
to appear in 23rd Design Automation and Test in Europe (DATE) Conference, Dresden, Germany, March 19 - 23, 2018.
|
Kun Yang, Haoting Shen, Domenic Forte, Swarup Bhunia, and Mark Tehranipoor,
“Hardware-Enabled Pharmaceutical Supply Chain Security”, to appear in ACM Transactions on Design Automation of Electronic Systems (TODAES).
|
Atul Prasad Debnath, Sandip Ray, Abhishek Basak, and Swarup Bhunia, “System-on-Chip Security Architecture and CAD Framework”,
to appear in 23rd Asia and South Pacific Design Automation Conference (ASPDAC), Korea, January 22 - 25, 2018.
|
Cheng Chen, Fengchao Zhang, Swarup Bhunia, and Soumyajit Mandal,
“Broadband Quantitative NQR for Authentication of Vitamins and Dietary Supplements”,
The Journal of Magnetic Resonance (JMR),
to appear.
|
Sarah Amir, Bicky Shakya, Domenic Forte, Mark Tehranipoor, and Swarup Bhunia,
“Comparative Analysis of Hardware Obfuscation for IP Protection”,
27th GLSVLSI, 2017.
[Invited paper in special session on logic obfuscation]
|
Robert Karam, Tamzidul Hoque, Kevin Butler, and Swarup Bhunia, “Mixed-Granular Architectural Diversity for Device Security in the Internet of Things”, to appear in AsianHOST, 2017.
|
Greg Stitt, Robert Karam, Kai Yang, and Swarup Bhunia,
“A Uniquified Virtualization Approach to Hardware Security”,
Embedded Systems Letters (ESL),
to appear.
|
Robert Karam, Tamzidul Hoque, Sandip Ray, Mark Tehranipoor, and Swarup Bhunia,
“MUTARCH: Architectural Diversity for FPGA Device and IP Security”,
to appear in 22nd Asia and South Pacific Design Automation Conference (ASPDAC), Tokyo, Japan, January 16 - 19, 2017.
|
Ujjwal Guin, Swarup Bhunia, Domenic Forte, and Mark M. Tehranipoor,
“SMA: A System-Level Mutual Authentication for Protecting Electronic Hardware and Firmware”,
IEEE Transactions on Dependable and Secure Computing (TDSC)),
Special Issue on Emerging Embedded and Cyber Physical System Security Challenges and Innovations.,
to appear.
|
Gustavo K. Contreras, Adib Nahiyan, Swarup Bhunia, Domenic Forte, Mark Tehranipoor,
“Security Vulnerability Analysis of Design-for-Test Exploits for Asset Protection in SoCs”,
to appear in 22nd Asia and South Pacific Design Automation Conference (ASPDAC), Tokyo, Japan, January 16 - 19, 2017.
|
Robert Karam, Tamzidul Hoque, Sandip Ray, Mark Tehranipoor and Swarup Bhunia,
“Robust Bitstream Protection in FPGA-based Systems through Low-Overhead Obfuscation”,
to appear in International Conference on Reconfigurable Computing and FPGAs (ReConFig), Cancun, Mexico, Nov 30 - Dec 2, 2016.
|
Yuanwen Huang, Swarup Bhunia, and Prabhat Mishra,
“MERS: Statistical Test Generation for Side-Channel Analysis based Trojan Detection”,
to appear in ACM Conference on Computer and Communications Security (CCS), Vienna, Austria, October 24 - 28, 2016.
|
Sandip Ray, Tamzidul Hoque, Abhishek Basak, and Swarup Bhunia,
“The Power Play: Security-Energy Trade-offs in the IoT Regime”, to appear in the
34th IEEE International Conference on Computer Design (ICCD), 2016,
|
Zimu Guo, Bicky Shakya, Haoting Shen, Swarup Bhunia, Navid Asadizanjani, Domenic Forte, Mark Tehranipoor,
“A New Methodology to Protect PCBs from Non-destructive Reverse Engineering”,
to appear in International Symposium for Testing and Failure Analysis (ISTFA), Texas, USA, November 6 - 10, 2016.
|
Dylan Ismari, Charles Lamech, Swarup Bhunia, Fareena Saqib, and James Plusquellic,
“On Detecting Delay Anomalies Introduced by Hardware Trojans”,
to appear in 35th IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2016.
|
Sanchita Mal-Sarkar, Robert Karam, Seetharam Narasimhan, Anandaroop Ghosh, Aswin Raghav Krishna, and Swarup Bhunia,
“Design and Validation for FPGA Trust under Hardware Trojan Attacks”, to appear in
IEEE Transactions on Multi-Scale Computing Systems (TMSCS), Special Issue on
Hardware/Software Cross-Layer Technologies for Trustworthy and Secure Computing.
|
Kan Xiao, Domenic Forte, Yier Jin, Ramesh Karri, Swarup Bhunia, Mark Tehranipoor,
“Hardware Trojans: Lessons Learned after One Decade of Research”,
to appear in ACM Transactions on Design Automation of Electronic Systems (TODAES).
|
Robert Karam, Rui Liu, Pai-Yu Chen, Shimeng Yu, and Swarup Bhunia,
“Security Primitive Design with Nanoscale Devices: A Case Study with Resistive RAM”,
26th GLSVLSI, 2016,
to appear.
|
Abhishek Basak, Swarup Bhunia, and Sandip Ray,
“Exploiting Design-for-Debug for Flexible SoC Security Architecture”,
Design Automation Conference (DAC), 2016,
to appear.
|
Cheng Chen, Fengchao Zhang, Soumyajit Mandal, Swarup Bhunia, Jamie Barras, and Kaspar Althoefer,
“Authentication of medicines using nuclear quadrupole resonance spectroscopy”,
IEEE/ACM Transactions on Computational Biology and Bioinformatics (TCBB), 2016,
to appear.
|
Steven Paley, Tamzidul Hoque, and Swarup Bhunia,
“Active Protection against PCB Physical Tampering”,
17th International Symposium on Quality Electronic Design (ISQED), 2016,
to appear.
|
Fengchao Zhang, James Plusquellic, and Swarup Bhunia,
“Current based PUF Exploiting Random Variations in SRAM Cells”,
Design Automation and Test in Europe (DATE), 2016,
to appear.
|
Andrew Hennessy, Yu Zheng, and Swarup Bhunia,
“JTAG-Based Robust PCB
Authentication for Protection against Counterfeiting Attacks”,
21st Asia and South Pacific Design Automation Conference (ASP-DAC),
to appear.
|
Abhishek Basak and Swarup Bhunia,
“P-Val: Antifuse-based Package-level Defense against Counterfeit ICs”,
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD),
to appear.
|
Yu Zheng, Shuo Yang, and Swarup Bhunia,
“SeMIA: Self-Similarity based IC Integrity Analysis”,
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD),
to appear.
|
Abhishek Basak, Sandip Ray, and Swarup Bhunia,
“A Flexible Architecture for Systematic Implementation of SoC Security Policies”,
to appear in 34th IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2015.
|
Abhishek Basak, Fengchao Zhang, and Swarup Bhunia,
“PiRA: IC Authentication Utilizing Intrinsic Variations in Pin Resistance”,
to appear in International Test Conference (ITC), 2015.
|
Jae-Won Jang, Jongsun Park, Swaroop Ghosh, and Swarup Bhunia,
“Self-Correcting STTRAM under Magnetic Field Attacks”,
Design Automation Conference (DAC), 2015, to appear.
|
Yu Zheng, Fengchao Zhang, and Swarup Bhunia
“DScanPUF: A Delay-based Physical Unclonable Function Built into Scan Chain”,
IEEE Transactions on Very Large Scale Integration (VLSI) Systems,
to appear.
|
Sandip Ray, Jin Yang, Abhishek Basak, and Swarup Bhunia,
“Correctness and Security and Odds: Post-silicon Validation of Modern SoC Designs”,
Design Automation Conference (DAC), 2015, to appear.
[Invited paper in special session on system-on-chip security validation]
|
Fengchao Zhang, Andrew Henessy, and Swarup Bhunia,
“Robust Counterfeit PCB Detection Exploiting Intrinsic Trace Impedance Variations”,
33rd IEEE VLSI Test Symposium (VTS), April 2015.
|
Swarup Bhunia, Michael Hsiao, Mainak Banga, Seetharam Narasimhan,
“Hardware Trojan Attacks: Threat Analysis and Countermeasures”,
Proceedings of the IEEE,
vol. 102, no. 8, pp. 1229-1247, 2014.
[Abstract]
[
Full Text: PDF |
 ]
Swaroop Ghosh, Abhishek Basak, and Swarup Bhunia,
“How Secure Are Printed Circuit Boards Against Trojan Attacks?”,
Design & Test, IEEE,
vol. PP, no. 99, pp. 1, 2014.
[Abstract]
[
Full Text: PDF |
]
Xinmu Wang, Yu Zheng, Abhishek Basak and Swarup Bhunia, “IIPS: Infrastructure IP for SoC Security”, to appear in IEEE Transactions on Computers (TComp), vol. PP, no. 99, pp. 1, 2014.
[Abstract]
[Full Text: PDF |
]
Wenjie Che, Swarup Bhunia and Jim Plusquellic,
“A Non-Volatile Memory based Physically Unclonable Function without Helper Data”,
IEEE International Conference on Computer Aided Design (ICCAD),
2014.
[Full Text: PDF |
]
Yu Zheng, Xinmu Wang and Swarup Bhunia,
“SACCI: Scan-based Characterization through Clock Phase Sweep for Counterfeit Chip Detection”,
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on,
vol. PP, no. 99, pp. 1, 2014.
[Abstract]
[
Full Text: PDF |
]
Yu Zheng, Abhishek Basak, and Swarup Bhunia,
“CACI: Dynamic Current Analysis towards Robust Recycled Chip Identification”,
DAC '14 Proceedings of the The 51st Annual Design Automation Conference on Design Automation Conference,
pp. 1-6, 2014.
[Abstract]
[Full Text: PDF |
]
Sanchita Mal-Sarkar, Aswin Krishna, Anandaroop Ghosh, Swarup Bhunia,
“Hardware Trojan Attacks in FPGA Devices: Threat Analysis and Effective Countermeasures”,
GLSVLSI '14 Proceedings of the 24th edition of the great lakes symposium on VLSI,
pp. 287-292, 2014.
[Abstract]
[Full Text: PDF |
]
Abhishek Basak, Yu Zheng, and Swarup Bhunia,
“Active Defense against Counterfeiting Attacks through Robust On-Chip Locks”,
VLSI Test Symposium (VTS), 2014 IEEE 32nd,
pp. 1-6, 2014.
[Abstract]
[Full Text: PDF |
]
Swarup Bhunia, “Secure and Trusted SoC: Challenges and Emerging Solutions”, to appear in
14th International Workshop on Microprocessor Test and Verification (MTV), 2013.
[Invited paper in special session on Security test and verification] |
Yu Zheng, MaryamSadat Hashemian, and Swarup Bhunia,
“A Robust Physical Unclonable Function Retrofitted into Embedded SRAM Array”,
Design Automation Conference (DAC), 2013 50th ACM / EDAC / IEEE,
pp. 1-9, 2013.
[Abstract]
[Full Text: PDF |
]
Abhishek Basak, Sanchita Mal-Sarkar, and Swarup Bhunia, “Secure and Trusted SoC: Challenges and Emerging Solutions”, in
14th International Workshop on Microprocessor Test and Verification (MTV), 2013.
[Invited paper in special session on Security test and verification]
[Abstract]
[Full Text: PDF |
]
Xinmu Wang, Wen Yueh, Debapriya Basu Roy, Saibal Mukhopadhyay, Debdeep Mukhopadhyay, and Swarup Bhunia,
“Role of Power Grid in Side Channel Attack and Power-Grid-Aware Secure Design”,
Design Automation Conference (DAC), 2013 50th ACM / EDAC / IEEE,
pp. 1-9, 2013.
[Abstract]
[Full Text: PDF |
]
Yu Zheng, Aswin Raghav Krishna, and Swarup Bhunia,
“ScanPUF: Robust Ultralow Overhead PUF Using Scan Chain”,
Design Automation Conference (ASP-DAC), 2013 18th Asia and South Pacific,
pp. 626-631, 2013.
[Abstract]
[Full Text: PDF |
]
Seetharam Narasimhan, Wen Yueh, Xinmu Wang, Saibal Mukhopadhyay, and Swarup Bhunia,
“Improving IC Security against Trojan Attacks through Integration of Security Monitors”,
Design & Test of Computers, IEEE,
vol. 29, no. 5, pp. 37-46, 2012.
[Abstract]
[
Full Text: PDF |
]
Seetharam Narasimhan, Dongdong Du, Rajat Subhra Chakraborty, Somnath Paul, Francis Wolff, Christos Papachristou, Kaushik Roy, and Swarup Bhunia,
“Hardware Trojan Detection by Multiple-Parameter Side-Channel Analysis”,
Computers, IEEE Transactions on,
vol. 62, no. 11, pp. 2183-2195, 2012.
[Abstract]
[
Full Text: PDF |
]
Xinmu Wang, Tatini Mal-Sarkar, Aswin Krishna, Seetharam Narasimhan, and Swarup Bhunia,
“Software Exploitable Hardware Trojan Attacks in Embedded Processor”,
Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), 2012 IEEE International Symposium on,
pp. 55-58, 2012.
[Student Paper Award]
[Abstract]
[Full Text: PDF |
]
Swarup Bhunia, Miron Abramovici, Dakshi Agarwal, Paul Bradley, Michael S. Hsiao, Jim Plusquellic, and Mohammad Tehranipoor,
“Protection against Hardware Trojan Attacks: Towards a Comprehensive Solution”,
IEEE Design & Test,
vol. 30, no. 3, pp. 6-17, 2012.
[Abstract]
[
Full Text: PDF |
]
Xinmu Wang, Seetharam Narasimhan, and Swarup Bhunia,
“SCARE: Side-Channel Analysis based Reverse Engineering for Post-Silicon Validation”,
VLSI Design (VLSID), 2012 25th International Conference on,
pp. 304-309, 2012.
[Abstract]
[Full Text: PDF |
]
Rajat Subhra Chakraborty and Swarup Bhunia, “Security Against Hardware Trojan Attacks Using Key-based Design Obfuscation”, Journal of Electronic Testing: Theory and Applications (JETTA), vol. 27. no. 6, pp. 767-785, Dec 2011. [Abstract] [Full Text: PDF |
]
Xinmu Wang, Seetharam Narasimhan, Aswin Krishna, Tatini Mal-Sarkar, and Swarup Bhunia,
“Sequential Hardware Trojan Attacks: Experiences from ESC 2010”,
29th IEEE International Conference on Computer Design (ICCD), 2011. [Appeared in the "Special Session on Hardware Trust: Capture the Chip"] |
Aswin Raghav Krishna, Seetharam Narasimhan, Xinmu Wang, and Swarup Bhunia,
“MECCA: A Robust Low-Overhead PUF using Embedded Memory Array”,
Workshop on Cryptographic Hardware and Embedded Systems (CHES), 2011. [Abstract] [Full Text: PDF |
]
Rajat Subhra Chakraborty, Seetharam Narasimhan, and Swarup Bhunia,
“Embedded Software Security through Key-based Control Flow Obfuscation”,
international Conference on Security Aspects in Information Technology, High-Performance Computing and Networking (InfoSecHiComNet), 2011. [Abstract] [Full Text: PDF |
]
Seetharam Narasimhan, Rajat Subhra Chakraborty and Swarup Bhunia, “Hardware IP Protection during Evaluation Using Embedded Sequential Trojan”, IEEE Design & Test of Computers (D&T), vol. PP, no. 99, pp. 1-9, 2011. [Abstract] [Full Text: PDF |
]
Seetharam Narasimhan, Xinmu Wang, Dongdong Du, Rajat Subhra Chakraborty, and Swarup Bhunia,
“TeSR: A Robust Temporal Self-Referencing Approach for Hardware Trojan Detection”, 4th IEEE
International Symposium on Hardware-Oriented Security and Trust (HOST), 2011. [Abstract] [Full Text: PDF |
]
Subidh Ali, Debdeep Mukhopadhyay, Rajat Subhra Chakraborty, and Swarup Bhunia,
“Multi-level Attack: an Emerging Threat Model for Cryptographic
Hardware”, Design Automation and Test in Europe
(DATE), 2011. [Abstract] [Full Text: PDF |
]
Tatini Mal-Sarkar and Swarup Bhunia,
“Collaborative Trust: A Novel Paradigm of Trusted Mobile Computing”, White paper by 9th Grade Student, 2011, Available online at Trust-Hub [Full Text: PDF |
 ].
Swarup Bhunia and Anand
Raghunathan, “Hardware Security: Design, Test and Validation
Issues”, Hot topic Special Session in IEEE VLSI Test Symposium
(VTS), pp. 349-349, 2010. [Invited one page article on the hot topic session] [Abstract] [Full Text: PDF |
]
Dongdong Du,
Seetharam Narasimhan, Rajat Subhra Chakraborty and
Swarup Bhunia, “Self-Referencing: A Scalable Side-Channel
Approach for Hardware Trojan Detection”, Workshop on
Cryptographic Hardware and Embedded Systems (CHES), 2010. [Abstract] [Full Text: PDF |
]
|
Seetharam Narasimhan, Dongdong Du,
Rajat Subhra Chakraborty,
Somnath Paul, Francis Wolff, Chris Papachristou, Kaushik Roy and Swarup Bhunia,
“Multiple-Parameter Side-Channel Analysis: A Non-invasive Hardware
Trojan Detection Approach”, IEEE Symposium on Hardware Oriented
Security and Trust (HOST), 2010. [Best Paper Candidate] [Abstract] [Full Text: PDF
|
Seetharam Narasimhan,
Xinmu Wang, and Swarup Bhunia, “Implantable Electronics:
Emerging Design Issues and An Ultra Light-weight Security Solution”,
IEEE Engineering in Medicine and Biology Society
Conference (EMBC), 2010. [Abstract] [Full Text: PDF
David McIntyre, Francis Wolff, Chris Papachristou, and Swarup
Bhunia, “Trustworthy Computing in a Multi-Core System Using
Distributed Scheduling”, IEEE International On-Line Testing
Symposium (IOLTS), 2010. [Abstract] [Full Text: PDF |
]
|
Rajat Subhra Chakraborty
and Swarup Bhunia, “RTL Hardware IP Protection Using
Key-Based Control and Data Flow Obfuscation”, 23rd
International Conference on VLSI Design, pp. 405-410, 2010.
[Abstract] [Full Text: PDF
|
Rajat Subhra Chakraborty and Swarup Bhunia,
“Embedded Software Security Through Key-based Obfuscation”, poster
presentation in Workshop on Cryptographic Hardware and
Embedded Systems (CHES), 2010. [Abstract] [Full Text: PDF
Rajat Subhra Chakraborty,
Seetharam Narasimhan, and Swarup Bhunia, “Hardware Trojan: Threats
and Emerging Solutions”, IEEE International High Level Design
Validation and Test Workshop (HLDVT), pp. 166-171, 2009. [Invited
paper in the special session on post-silicon validation] [Abstract] [Full Text: PDF |
]
Rajat Subhra Chakraborty
and Swarup Bhunia, "Security against Hardware Trojan through
a Novel Application of Design Obfuscation," IEEE International
Conference on Computer Aided Design (ICCAD), pp. 113-116, 2009. [Abstract] [Full Text: PDF |
]
Rajat Subhra Chakraborty and
Swarup Bhunia, "HARPOON: An
Obfuscation based SoC Design Methodology for Hardware Protection", IEEE
Trans. on Computer Aided Design of Integrated Circuits and Systems,
vol. 28, no. 10, pp. 1493-1502, Sep. 2009. [Abstract]
[ Full
Text: PDF |
]
Rajat Subhra Chakraborty, Francis Wolff, Somnath
Paul, Christos Papachristou and Swarup Bhunia, "MERO: A Statistical
Approach for Hardware Trojan Detection", Workshop on Cryptographic
Hardware and Embedded Systems (CHES), 2009. [Appeared in the "Hot Topic Session: Hardware Trojans and Trusted ICs"]
[Abstract]
[ Full
Text: PDF |
]
Rajat Subhra Chakraborty
and Swarup Bhunia, "Security through Obscurity: An Approach
for Protecting Register Transfer Level Hardware IP," IEEE
Hardware Oriented Security and Trust (HOST) Workshop, pp. 96-99,
2009. [Abstract] [Full Text: PDF |
]
David McIntyre, Francis Wolff, Christos Papachristou,
Swarup Bhunia and Dan Weyer, "Dynamic Evaluation of Hardware
Trust", IEEE Hardware Oriented Security and Trust (HOST) Workshop
2009.[Abstract]
[Full
Text: PDF |
 ]
Rajat Subhra Chakraborty and Swarup Bhunia, "Hardware
Protection Through Netlist-Level Obfuscation", IEEE International
Conference on Computer Aided Design (ICCAD), 2008. [Abstract]
[Full
Text: PDF |
]
Rajat Subhra Chakraborty, Somnath Paul and Swarup
Bhunia, "On-Demand Transparency for Improving Hardware Trojan
Detectability," IEEE Hardware Oriented Security and Trust (HOST)
Workshop, 2008. [Abstract]
[Full
Text: PDF |
]
Francis Wolff, Christos Papachristou, Rajat Subhra
Chakraborty and Swarup Bhunia, "Towards Trojan-Free Trusted ICs:
Problem Analysis and a Low-Overhead Detection Scheme," Design
Automation and Test in Europe (DATE), 2008. [Abstract]
[Full
Text: PDF |
]
Somnath Paul, Rajat Subhra Chakraborty and Swarup
Bhunia, "VIm-Scan: A Low Overhead Scan Design Approach for
Protection of Secret Key in Scan-Based Secure Chips," VLSI Test
Symposium (VTS), 2007. [Abstract]
[Full
Text: PDF |
] |