JOURNAL PUBLICATIONS

Published/Accepted for Publication
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2022
Atul Prasad Deb Nath, Kshitij Raj, Swarup Bhunia, Sandip Ray, “SOCCOM: Automated Synthesis of System-on-Chip Architectures”, IEEE Transactions on Very Large Scale Integration (VLSI) Systems vol. pp, issue 99, pp. 1, 2022.
Prabuddha Chakraborty, Swarup Bhunia, “BINGO: brain-inspired learning memory”, Neural Computing and Applications, vol. 34, issue 4, pp. 3223-3247, 2022.
Shuo Yang, Tamzidul Hoque, Prabuddha Chakraborty, Swarup Bhunia, “Golden-Free Hardware Trojan Detection Using Self-Referencing”, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 30, issue 3, pp. 325-338, 2022.
2021
Junjun Huan, Joshua S Bernstein, Parker Difuntorum, Naren Vikram Raj Masna, Nikolaus Gravenstein, Swarup Bhunia, Soumyajit Mandal, “A Wearable Skin Temperature Monitoring System for Early Detection of Infections”, IEEE Sensors Journal, vol. 22, issue 2, pp. 1670-1679, 2021.
Prabuddha Chakraborty, Jonathan Cruz, Christopher Posada, Sandip Ray, Swarup Bhunia, “HASTE: Software Security Analysis for Timing Attacks on Clear Hardware Assumption”, IEEE Embedded Systems Letters, vol. PP, issue 99, pp. 1, 2021.
Rohan Reddy Kalavakonda, Naren Vikram Raj Masna, Soumyajit Mandal, Swarup Bhunia, “A smart mask for active defense against airborne pathogens”, Scientific Reports, vol. 11, issue 1, pp. 1-9, 2021.
Sumaiya Shomaji, Naren Vikram Raj Masna, David Ariando, Shubhra Deb Paul, Kelsey Horace-Herron, Domenic Forte, Soumyajit Mandal, Swarup Bhunia, “Detecting Dye-Contaminated Vegetables Using Low-Field NMR Relaxometry”, Foods, vol. 10, issue 9, pp. 2232, 2021.
Prabuddha Chakraborty, Jonathan Cruz, Abdulrahman Alaql, Swarup Bhunia, “SAIL: Analyzing structural artifacts of logic locking using machine learning”, IEEE Transactions on Information Forensics and Security, vol. 16, pp. 3828-3842, 2021.
Shubhra Deb Paul, Swarup Bhunia, “Silverin: Systematic integrity verification of printed circuit board using jtag infrastructure”, ACM Journal on Emerging Technologies in Computing Systems (JETC), vol. 17, issue 3, pp. 1-28, 2021.
Abdulrahman Alaql, Md Moshiur Rahman, Swarup Bhunia, “SCOPE: Synthesis-based constant propagation attack on logic locking”, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 29, issue 8, pp. 1529-1542, 2021.
Abdulrahman Alaql, Swarup Bhunia, “SARO: Scalable Attack-Resistant Logic Locking”, IEEE Transactions on Information Forensics and Security, vol. 16, pp. 3724-3739, 2021.
Naren Vikram Raj Masna, Junjun Huan, Soumyajit Mandal, Swarup Bhunia, “NQR sensitive embedded signatures for authenticating additively manufactured objects”, Scientific Reports, vol. 11, issue 1, pp. 1-12, 2021.
Roozbeh Tabrizian, Swarup Bhunia, “The Hidden Authenticators: Nanometer-Scale Electromechanical Tags Could Thwart Counterfeiters”, IEEE Spectrum, vol. 58, issue 6, pp. 32-37, 2021.
Abdulrahman Alaql, Saranyu Chattopadhyay, Prabuddha Chakraborty, Tamzidul Hoque, Swarup Bhunia, “LeGO: A learning-guided obfuscation framework for hardware IP protection”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. pp, issue 99, pp. 1, 2021.
Xinmu Wang, Tamzidul Hoque, Abhishek Basak, Robert Karam, Wei Hu, Maoyuan Qin, Dejun Mu, Swarup Bhunia, “Hardware trojan attack in embedded memory”, ACM Journal on Emerging Technologies in Computing Systems (JETC), vol. 17, issue 1, pp. 1-28, 2021.
Shuo Yang, Shubhra Deb Paul, Swarup Bhunia, “Hands-On Learning of Hardware and Systems Security.”, Advances in Engineering Education, vol. 9, issue 2, pp. 25, 2021.
2020
Wei Hu, Chip-Hong Chang, Anirban Sengupta, Swarup Bhunia, Ryan Kastner, Hai Li, “An overview of hardware security and trust: Threats, countermeasures, and design tools”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 29, issue 1, pp. 149-161, 2020.
Fengchao Zhang, Shubhra Deb Paul, Patanjali Slpsk, Amit Ranjan Trivedi, Swarup Bhunia, “On database-free authentication of microelectronic components”, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. PP, issue 99, pp. 1, 2020.
Sushant Rassay, Mehrdad Ramezani, Sumaiya Shomaji, Swarup Bhunia, Roozbeh Tabrizian, “Clandestine nanoelectromechanical tags for identification and authentication”, Microsystems & nanoengineering, vol. 6, issue 1, pp. 1-8, 2020.
Prabuddha Chakraborty, Jonathan Cruz, Swarup Bhunia, “MAGIC: Machine-Learning-Guided Image Compression for Vision Applications in Internet of Things”, IEEE Internet of Things Journal, vol. 8, issue 9, pp. 7303-7315, 2020.
Rohan Reddy Kalavakonda, Naren Vikram Raj Masna, Anamika Bhuniaroy, Soumyajit Mandal, Swarup Bhunia, “A smart mask for active defense against coronaviruses and other airborne pathogens”, IEEE Consumer Electronics Magazine, vol. 10, issue 2, pp. 72-79, 2020.
Abdulrahman Alaql, Md Moshiur Rahman, Tamzidul Hoque, Swarup Bhunia, “Hardware obfuscation for IP protection”, Frontiers in Hardware Security and Trust: Theory, design and practice, vol. PP, issue 99, pp. 71, 2020.
Wei Zhang, Helen Li, Wujie Wen, Swarup Bhunia, “Guest Editorial: ACM JETC Special Issue on New Trends in Nanolectronic Device, Circuit, and Architecture Design: Part 2”, ACM Journal on Emerging Technologies in Computing Systems (JETC), vol. 16, issue 4, pp. 1-3, 2020.
Helen Li, Wei Zhang, Swarup Bhunia, Wujie Wen, “Introduction to the Special Issue on New Trends in Nanoelectronic Device, Circuit, and Architecture Design, Part 1”, ACM Journal on Emerging Technologies in Computing Systems (JETC), vol. 16, issue 3, pp. 1-3, 2020.
Tamzidul Hoque, Patanjali Slpsk, Swarup Bhunia, “Trust issues in microelectronics: The concerns and the countermeasures”, IEEE Consumer Electronics Magazine, vol. 9, issue 6, pp. 72-83, 2020.
Ahish Shylendra, Priyesh Shukla, Saibal Mukhopadhyay, Swarup Bhunia, Amit Ranjan Trivedi, “Low power unsupervised anomaly detection by nonparametric modeling of sensor statistics”, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 28, issue 8, pp. 1833-1843, 2020.
Tamzidul Hoque, Rajat Subhra Chakraborty, Swarup Bhunia, “Hardware obfuscation and logic locking: A tutorial introduction”, IEEE Design & Test, vol. 37, issue 3, pp. 59-77, 2020.
Atul Prasad Deb Nath, Srivalli Boddupalli, Swarup Bhunia, Sandip Ray, “Resilient system-on-chip designs with noc fabrics”, IEEE Transactions on Information Forensics and Security, vol. 15, pp. 2808-2823, 2020.
K Keerthi, Indrani Roy, Chester Rebeiro, Aritra Hazra, Swarup Bhunia, “FEDS: Comprehensive fault attack exploitability detection for software implementations of block ciphers”, IACR Transactions on Cryptographic Hardware and Embedded Systems, vol. 2020, issue 2, pp. 272-299, 2020.
Cheng Chen, Xinyao Tang, Naren Vikram Raj Masna, Swarup Bhunia, Soumyajit Mandal, “Single-shot spatially-localized NQR using field-dependent relaxation rates”, Journal of Magnetic Resonance, vol. 311, pp. 106660, 2020.
2019
Prabhat Mishra, Debdeep Mukhopadhyay, Swarup Bhunia, “Guest Editorial: Special Section on Autonomous Intelligence for Security and Privacy Analytics”, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 27, issue 12, pp. 2703-2705, 2019.
Tamzidul Hoque, Kai Yang, Robert Karam, Shahin Tajik, Domenic Forte, Mark Tehranipoor, Swarup Bhunia, “Hidden in plaintext: An obfuscation-based countermeasure against FPGA bitstream tampering attacks”, ACM Transactions on Design Automation of Electronic Systems, vol. 25, issue 1, pp. 1-32, 2019.
Sumaiya Shomaji, Parisa Dehghanzadeh, Alex Roman, Domenic Forte, Swarup Bhunia, Soumyajit Mandal, “Early detection of cardiovascular diseases using wearable ultrasound device”, IEEE Consumer Electronics Magazine, vol. 8, issue 6, pp. 12-21, 2019.
Swarup Bhunia, Soumyajit Mandal, “Countering counterfeit drugs: a technique used for detecting explosives can also verify the integrity of medicines”, IEEE Spectrum, vol. 56, issue 9, pp. 38-43, 2019.
Ahish Shylendra, Swarup Bhunia, and Amit Ranjan Trivedi, “An Intrinsic and Database-free Authentication by Exploiting Process Variation in Back-end Capacitors”, to appear in IEEE Transactions on Very Large Scale Integration Systems, vol. 27, issue 6, pp. 1253-1261, 2019.
Indrani Roy, Chester Rebeiro, Aritra Hazra, Swarup Bhunia, “SAFARI: Automatic synthesis of fault-attack resistant block cipher implementations”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 39, issue 4, pp. 752-765, 2019.
Naren Vikram Raj Masna, Cheng Chen, Soumyajit Mandal, and Swarup Bhunia, “Robust Authentication of Consumables with Extrinsic Tags and Chemical Fingerprinting”, IEEE Access, vol. 7, pp. 14396-14409, 2019.
2018
Sumaiya Shomaji, Parisa Dehghanzadeh, Alex Roman, Domenic Forte, Swarup Bhunia, and Soumyajit Mandal“Early Detection of Cardiovascular Diseases Using Wearable Ultrasound Device”, to appear in IEEE Consumer Electronics Magazine (CEM).
Indrani Roy, Chester Rebeiro, Aritra Hazra, and Swarup Bhunia, “SAFARI: Automatic Synthesis of Fault-Attack Resistant Block Cipher Implementations”, to appear in IEEE Transactions on CAD of Integrated Circuits and Systems (TCAD).
Naren Vikram Raj Masna, Cheng Chen, Soumyajit Mandal, and Swarup Bhunia, “Authentication of Dietary Supplements through Nuclear Quadrupole Resonance (NQR) Spectroscopy”, to appear in International Journal of Food Science and Technology (IJFST).
Naren Vikram Raj Masna, Shubhra Deb Paul, Cheng Chen, Soumyajit Mandal, and Swarup Bhunia, “Eat, but Verify: Low-Cost Portable Devices for Food Safety Analysis”, to appear in IEEE Consumer Electronics Magazine (CEM).
Yuanwen Huang, Swarup Bhunia, and Prabhat Mishra, “Scalable Test Generation for Trojan Detection using Side Channel Analysis”, to appear in IEEE Transactions on Information Forensics & Security (TIFS).
Sarah Amir, Bicky Shakya, Xiaolin Xu, Yier Jin, Swarup Bhunia, Mark Tehranipoor, and Domenic Forte, “Development and Evaluation of Hardware Obfuscation Benchmarks”, to appear in Journal of Hardware and Systems Security (HaSS).
2017
Robert Karam, Steve Majerus, Dennis Bourbou, Margot S. Damaser, and Swarup Bhunia, “Tunable and Lightweight On-chip Event Detection for Implantable Bladder Pressure Monitoring Devices”, to appear in IEEE Transactions on Biomedical Circuits and Systems (TBioCAS).
Kun Yang, Haoting Shen, Domenic Forte, Swarup Bhunia, and Mark Tehranipoor, “Hardware-Enabled Pharmaceutical Supply Chain Security”, to appear in ACM Transactions on Design Automation of Electronic Systems (TODAES).
Anthony Bahadir Lopez, Korosh Vatanparvar, Atul Prasad Deb Nath, Shuo Yang, Swarup Bhunia, Mohammad Abdullah Al Faruque, “A Security Perspective on the Battery Systems of the Internet of Things”, Journal of Hardware and Systems Security (HASS), Springer, 2017. [Abstract] [Full Text: PDF pdf]
Kai Yang, Robert Karam, Somnath Paul, and Swarup Bhunia, “Energy-Efficient Reconfigurable Hardware Accelerators for Data-Intensive Applications”, to appear in Journal of Low Power Electronics (JOLPE) Special Issue on Special Issue on “New and Future Trends in Low Power Electronics”. [Abstract] [Full Text: PDF pdf]
Bicky Shakya, Hassan Salmani, Domenic Forte, Swarup Bhunia, and Mark Tehranipoor, “Benchmarking of Hardware Trojans and Maliciously Affected Circuits”, Journal of Hardware and Systems Security (HaSS), Springer, 2017. [Abstract] [Full Text: PDF pdf]
Cheng Chen, Fengchao Zhang, Swarup Bhunia, and Soumyajit Mandal, “Broadband Quantitative NQR for Authentication of Vitamins and Dietary Supplements”, The Journal of Magnetic Resonance (JMR). [Abstract] [Full Text: PDF pdf]
Greg Stitt, Robert Karam, Kai Yang, and Swarup Bhunia, “A Uniquified Virtualization Approach to Hardware Security”, Embedded Systems Letters (ESL). [Abstract] [Full Text: PDF pdf]
Abhishek Basak, Swarup Bhunia, Thomas Tkacik, and Sandip Ray, “Security Assurance for System-on-Chip Designs with Untrusted IPs”, IEEE Transactions on Information Forensics & Security (TIFS). [Abstract] [Full Text: PDF pdf]
Tamzidul Hoque, Seetharam Narasimhan, Xinmu Wang, Sanchita Mal-Sarkar, and Swarup Bhunia, “Golden-Free Hardware Trojan Detection with High Sensitivity Under Process Noise”, Journal of Electronic Testing: Theory and Applications (JETTA). [Abstract] [Full Text: PDF pdf]
2016
Robert Karam, Somnath Paul, Ruchir Puri, and Swarup Bhunia, “Memory-Centric Reconfigurable Accelerator for Classification and Machine Learning Applications”, ACM Journal of Emerging Technologies in Computing Systems (JETC). [Abstract] [Full Text: PDF pdf]
Ujjwal Guin, Swarup Bhunia, Domenic Forte, and Mark M. Tehranipoor, “SMA: A System-Level Mutual Authentication for Protecting Electronic Hardware and Firmware”, IEEE Transactions on Dependable and Secure Computing (TDSC)), Special Issue on Emerging Embedded and Cyber Physical System Security Challenges and Innovations.. [Abstract] [Full Text: PDF pdf]
Dongyeob Shin, Jangwon Park, Jongsun Park, Somnath Paul, and Swarup Bhunia, “Adaptive ECC for Tailored Protection of Nanoscale Memory”, IEEE Design & Test of Computers (D&T). [Abstract] [Full Text: PDF pdf]
Sanchita Mal-Sarkar, Robert Karam, Seetharam Narasimhan, Anandaroop Ghosh, Aswin Raghav Krishna, and Swarup Bhunia, “Design and Validation for FPGA Trust under Hardware Trojan Attacks”, to appear in IEEE Transactions on Multi-Scale Computing Systems (TMSCS), Special Issue on Hardware/Software Cross-Layer Technologies for Trustworthy and Secure Computing. [Abstract] [Full Text: PDF pdf]
Wenchao Qian, Chris Babecki, Robert Karam, Somnath Paul, and Swarup Bhunia, “ENFIRE: A Spatio-temporal Fine-grained Reconfigurable Hardware”, to appear in IEEE Transactions on VLSI Systems (TVLSI). [Abstract] [Full Text: PDF pdf]
Kan Xiao, Domenic Forte, Yier Jin, Ramesh Karri, Swarup Bhunia, Mark Tehranipoor, “Hardware Trojans: Lessons Learned after One Decade of Research”, ACM Transactions on Design Automation of Electronic Systems (TODAES), 2017. [Best Paper Award] [Abstract] [Full Text: PDF pdf]
Robert Karam, Ruchir Puri, and Swarup Bhunia, “Energy-Efficient Adaptive Hardware Accelerator for Text Mining Application Kernels”, to appear in IEEE Transactions on VLSI Systems (TVLSI), 2016. [Abstract] [Full Text: PDF pdf]
Cheng Chen, Fengchao Zhang, Soumyajit Mandal, Swarup Bhunia, Jamie Barras, and Kaspar Althoefer, “Authentication of medicines using nuclear quadrupole resonance spectroscopy”, to appear in IEEE/ACM Transactions on Computational Biology and Bioinformatics (TCBB), Special Issue on Emerging Security Trends for Biomedical Computations, Devices, and Infrastructures, 2016. [Abstract] [Full Text: PDF pdf]
Wenchao Qian, Pai-Yu Chen, Ligang Gao, Swarup Bhunia, and Shimeng Yu, “Energy-Efficient Adaptive Computing with Multifunctional Memory”, to appear in IEEE Transactions on Circuit and Systems-II (TCAS-II). [Abstract] [Full Text: PDF pdf]
Christopher Babecki, Wenchao Qian, Somnath Paul, Robert Karam, and Swarup Bhunia, “A Memory-Centric Reconfigurable Hardware Accelerator for Security Applications”, to appear in IEEE Transactions on Computers (TComp), 2016. [Abstract] [Full Text: PDF pdf]
Sandip Ray, Jongsun Park, and Swarup Bhunia, “Wearables, Implants, and Internet of Things: Towards Unifying Technologies to Support Diverse Paradigms”, to appear in IEEE Transactions on Multi-Scale Computing Systems (TMSCS) [Perspective paper in the Special issue on Wearables, Implants, and Internet of Things], 2016. [Abstract]
2015
Robert Karam, Dennis Bourbeau, Steve Majerus, Iryna Makovey, Howard Goldman, Margot Damaser, Swarup Bhunia, “Real-Time Classification of Bladder Events for Effective Diagnosis and Treatment of Urinary Incontinence”, IEEE Transactions on Biomedical Engineering (TBME), 2015. [Abstract] [Full Text: PDF pdf]
Abhishek Basak and Swarup Bhunia, “P-Val: Antifuse-based Package-level Defense against Counterfeit ICs”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. PP, issue 99, pp. 1, 2015. [Abstract] [Full Text: PDF pdf]
Yu Zheng, Shuo Yang, and Swarup Bhunia, “SeMIA: Self-Similarity based IC Integrity Analysis”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. PP, issue 99, pp. 1, 2015. [Abstract] [Full Text: PDF pdf]
Wenbo Chen, Wenchao Lu, Branden Long, Yibo Li, David Gilmer, Gennadi Bersuker, Swarup Bhunia, and Rashmi Jha “Switching Characteristics of W/Zr/HfO2/TiN ReRAM Devices for Multi-level Cell Non-Volatile Memory Applications”, Semiconductor Science and Technology, IOP Publishing, vol. 30, issue 7, 2015. [Abstract] [Full Text: PDF pdf]
Yu Zheng, Fengchao Zhang, and Swarup Bhunia “DScanPUF: A Delay-based Physical Unclonable Function Built into Scan Chain”, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. PP, issue 99, pp. 1, 2015. [Abstract] [Full Text: PDF pdf]
Tina He, Fengchao Xhang, Swarup Bhunia, and Philip Feng “Silicon Carbide (SiC) Nanoelectromechanical Antifuse for Ultralow-Power FPGA Interconnects”, IEEE Journal of the Electron Devices Society (JEDS), vol. 3, issue 4, pp. 323-335, 2015. [Abstract] [Full Text: PDF pdf]
Kaushik Roy, Deliang Fan, Xuanyao Fong, Yusung Kim, Mrigank Sharad, Somnath Paul, Subho Chatterjee, Swarup Bhunia, and Saibal Mukhopadhyay, “Exploring Spin Transfer Torque Devices for Unconventional Computing”, IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS), [Perspective paper in the Special issue on Computing in Emerging Technologies], vol. 5, no. 1, pp. 5-16, March 2015. [Abstract] [Full Text: PDF pdf]
2014
Wen Yueh, Subho Chatterjee, Muneeb Zia, Student Member, Swarup Bhunia, and Saibal Mukhopadhyay, “A Memory-Based Logic Block with Optimized-for-Read SRAM for Energy-efficient Reconfigurable Computing Fabric”, to appear in IEEE Transactions on Circuits and Systems II (TCAS-II).
Swaroop Ghosh, Abhishek Basak, and Swarup Bhunia, “How Secure Are Printed Circuit Boards Against Trojan Attacks?”, Design & Test, IEEE, vol. PP, no. 99, pp. 1, 2014. [Abstract] [Full Text: PDF pdf]
Xinmu Wang, Yu Zheng, Abhishek Basak and Swarup Bhunia, “IIPS: Infrastructure IP for SoC Security”, to appear in IEEE Transactions on Computers (TComp), vol. PP, no. 99, pp. 1, 2014. [Abstract] [Full Text: PDF pdf]
Somnath Paul, Aswin Krishna, Wenchao Qian, Robert Karam, and Swarup Bhunia, “MAHA: An Energy-Efficient Malleable Hardware Accelerator for Data-Intensive Applications”, Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, vol. PP, no. 99, pp. 1, 2014. [Abstract] [Full Text: PDF pdf]
Yu Zheng, Xinmu Wang and Swarup Bhunia, “SACCI: Scan-based Characterization through Clock Phase Sweep for Counterfeit Chip Detection”, Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, vol. PP, no. 99, pp. 1, 2014. [Abstract] [Full Text: PDF pdf]
Somnath Paul, Saibal Mukhopadhyay and Swarup Bhunia, “A Variation-Aware Preferential Design Approach for Memory-Based Reconfigurable Computing”, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 22, No. 12, pp. 2449-60, 2014. [Abstract] [Full Text: PDF pdf]
2013
Abhishek Basak, Vaishnavi Ranganathan and Swarup Bhunia, “Implantable Ultrasonic Imaging Assembly for Automated Monitoring of Internal Organs”, Biomedical Circuits and Systems, IEEE Transactions on, vol. PP, no. 99, pp. 1, 2014. [Abstract] [Full Text: PDF pdf]
Jongsun Park, Jangwon Park and Swarup Bhunia, “VL-ECC: Variable Data-Length Error Correction Code for Embedded Memory in DSP Applications”, Circuits and Systems II: Express Briefs, IEEE Transactions on, vol. 61, no. 2, pp. 120-124, 2013. [Abstract] [Full Text: PDF pdf]
Anandaroop Ghosh, Somnath Paul, Jongsun Park, and Swarup Bhunia, “Improving Energy Efficiency in FPGA through Judicious Mapping of Computation to Embedded Memory Blocks”, Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, vol. 22, no. 6, pp. 1314-1327, 2013. [Abstract] [Full Text: PDF pdf]
2012
Seetharam Narasimhan, Wen Yueh, Xinmu Wang, Saibal Mukhopadhyay, and Swarup Bhunia, “Improving IC Security against Trojan Attacks through Integration of Security Monitors”, Design & Test of Computers, IEEE, vol. 29, no. 5, pp. 37-46, 2012. [Abstract] [Full Text: PDF pdf]
Seetharam Narasimhan, Dongdong Du, Rajat Subhra Chakraborty, Somnath Paul, Francis Wolff, Christos Papachristou, Kaushik Roy, and Swarup Bhunia, “Hardware Trojan Detection by Multiple-Parameter Side-Channel Analysis”, Computers, IEEE Transactions on, vol. 62, no. 11, pp. 2183-2195, 2012. [Abstract] [Full Text: PDF pdf]
Swarup Bhunia, Miron Abramovici, Dakshi Agarwal, Paul Bradley, Michael S. Hsiao, Jim Plusquellic, and Mohammad Tehranipoor, “Protection against Hardware Trojan Attacks: Towards a Comprehensive Solution”, IEEE Design & Test, vol. 30, no. 3, pp. 6-17, 2012. [Abstract] [Full Text: PDF pdf]
Seetharam Narasimhan, Keerthi Kunaparaju, and Swarup Bhunia, “Healing of DSP Circuits under Power Bound Using Post-Silicon Operand Bitwidth Truncation”, IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 59, no. 9, pp. 1932-1941, 2012. [Abstract] [Full Text: PDF pdf]
2011
Somnath Paul, Subho Chatterjee, Saibal Mukhopadhyay and Swarup Bhunia, “Energy-Efficient Reconfigurable Computing Using a Circuit-Architecture-Software Co-Design Approach”, IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS) Special Issue on Advances in Design of Energy-Efficient Circuits and Systems, vol. 1, no. 3, pp. 369-380, 2011. [Abstract] [Full Text: PDF pdf]
Rajat Subhra Chakraborty and Swarup Bhunia, “Security Against Hardware Trojan Attacks Using Key-based Design Obfuscation”, Journal of Electronic Testing: Theory and Applications (JETTA), vol. 27. no. 6, pp. 767-785, Dec 2011. [Abstract] [Full Text: PDF pdf]
Seetharam Narasimhan, Rajat Subhra Chakraborty and Swarup Bhunia, “Hardware IP Protection during Evaluation Using Embedded Sequential Trojan”, IEEE Design & Test of Computers (D&T), vol. PP, no. 99, pp. 1-9, 2011. [Abstract] [Full Text: PDF pdf]
Seetharam Narasimhan, Hillel Chiel and Swarup Bhunia, “Ultra Low-Power and Robust Digital Signal Processing Hardware for Implantable Neural Interface Microsystems”, IEEE Transactions on Biomedical Circuits and Systems (TBioCAS), vol. 5, no. 2, pp. 169-178, April 2011. [Abstract] [Full Text: PDF pdf]
Somnath Paul, Fang Cai, Xinmiao Zhang and Swarup Bhunia, "Reliability-Driven ECC Allocation for Multiple Bit Error Resilience in Processor Cache", IEEE Transactions on Computers (TC) Special Issue on Dependable Computer Architecture, vol. 60, no. 1, pp. 20-34, Feb 2011. [Abstract] [Full Text: PDF pdf]
Somnath Paul and Swarup Bhunia, "Dynamic Transfer of Computation to Processor Cache for Yield and Reliability Improvement", IEEE Transactions on Very Large Scale Integration Systems (TVLSI), vol. 19, no. 8, pp. 1368-1379, 2011. [Abstract] [Full Text: PDF pdf]
Somnath Paul, Saibal Mukhopadhyay and Swarup Bhunia, "Circuit and Architecture Co-design Approach for Hybrid CMOS-STTRAM Non-volatile FPGA",  IEEE Transactions on Nanotechnology (TNANO), vol. 10, no. 3, pp. 385-394, 2010. [Abstract] [Full Text: PDF pdf]
Somnath Paul and Swarup Bhunia, "A Scalable Memory-based Reconfigurable Computing Framework for Nanoscale Crossbar", IEEE Transactions on Nanotechnology (TNANO), vol. pp, no. 99, pp. 1-10, 2010. [Abstract] [Full Text: PDF pdf]
Somnath Paul, Hamid Mahmoodi and Swarup Bhunia, "Low-Overhead Fmax Calibration at Multiple Operating Points Using Delay Sensitivity Based Path Selection", ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 15, no. 2, Feb 2010. [Abstract] [ Full Text: PDF pdf]
Patrick Ndai, Nauman Rafique, Mithuna Thottethodi, Swaroop Ghosh, Swarup Bhunia and Kaushik Roy, "Trifecta: A Non-Speculative Scheme to Exploit Common, Data-Dependent Subcritical Paths",  IEEE Trans. on Very Large Scale Integration Systems (TVLSI), vol. 18, no. 1, pp. 53-65, Jan. 2010. [Abstract] [Full Text: PDF pdf]
2009
Rajat Subhra Chakraborty and Swarup Bhunia, “A Study of Asynchronous Design Methodology for Robust CMOS-Nano Hybrid System Design”, ACM Journal on Emerging Technologies in Computing Systems (JETC), vol. 5, no. 3, pp. 12:1-12:22, Aug 2009. [Abstract] [ Full Text: PDF pdf]
Rajat Subhra Chakraborty and Swarup Bhunia, "HARPOON: An Obfuscation based SoC Design Methodology for Hardware Protection",  IEEE Trans. on Computer Aided Design of Integrated Circuits and Systems, vol. 28, no. 10, pp. 1493-1502, Sep. 2009. [Abstract] [ Full Text: PDF pdf]
Rajat Subhra Chakraborty, Somnath Paul, Yu Zhou and Swarup Bhunia, "Low-Power Hybrid CMOS-NEMS FPGA: Circuit Level Analysis and Defect-Aware Mapping",  IET Computers and Digital Techniques (IETCDT), vol. 3, no. 6, pp. 609-624, Nov. 2009. [Abstract] [ Full Text: PDF pdf]
2008
Patrick Ndai, Swarup Bhunia, Amit Agarwal and Kaushik Roy, "Within-Die Variation-Aware Scheduling in Superscalar Processors for Improved Throughput", IEEE Transactions on Computers, vol. 57, no. 7, pp. 940-951, July 2008.[Abstract] [Full Text: PDF pdf]
Swarup Bhunia, Hamid Mahmoodi, Arijit Raychowdhury and Kaushik Roy, "Arbitrary Two-Pattern Delay Testing Using A Low-Overhead Supply Gating Technique", Journal of Electronic Testing: Theory and Applications (JETTA), vol. 24, no. 6, pp. 577-590, June 2008. [Abstract] [Full Text: PDF pdf]
Animesh Datta, Swarup Bhunia, Jung Hwan Choi, Saibal Mukhopadhyay, and Kaushik Roy, "Profit Aware Circuit Design under Process Variations Considering Speed Binning", IEEE Trans. on Very Large Scale Integration Systems, vol. 16, no. 7, pp. 806-815, July 2008. [Abstract] [Full Text: PDF pdf]
2007
Rajat Subhra Chakraborty, Seetharam Narasimhan and Swarup Bhunia, "Hybridization of CMOS with CNT-Based Nano Electromechanical Switch for Low Leakage and Robust Circuit Design", IEEE Trans. on Circuits and Systems, vol. 54, no. 7, pp. 2480-2488, Nov. 2007. [Abstract] [Full Text: PDF pdf]
Swaroop Ghosh, Swarup Bhunia and Kaushik Roy, "Low-Power and Testable Circuit Synthesis Using Shannon Decomposition", ACM Trans. on Design Automation of Electronic Systems (TODAES), vol. 12, no. 4, pp. 47:1-47:6, Sep. 2007. [Abstract] [Full Text: PDF pdf]
Amit Agarwal, Kunhyuk Kang, Swarup Bhunia and Kaushik Roy, "Device-Aware Yield-Centric Dual-Vt Design under Parameter Variations in Nano-Scale Technologies", IEEE Trans. on Very Large Scale Integration Systems, vol. 15, no. 6, pp. 660-671, June 2007. [Abstract] [Full Text: PDF pdf]
Swaroop Ghosh, Swarup Bhunia and Kaushik Roy, "CRISTA: A New Paradigm for Low-power, Variation-Tolerant and Adaptive Circuit Synthesis Using Critical Path Isolation", IEEE Trans. on Computer Aided Design of Integrated Circuits and Systems, vol. 26, no. 11, pp. 1947-1956, Nov. 2007. [Abstract] [Full Text: PDF pdf]
2006
Nilanjan Banerjee, Arijit Raychowdhury, Kaushik Roy, Swarup Bhunia, Hamid Mahmoodi, “Novel Low-Overhead Operand Isolation Techniques for Low-Power Datapath Synthesis”, IEEE Trans. on Very Large Scale Integration Systems, vol. 14, no. 9, pp. 1034-1039, 2006. [Abstract] [Full Text: PDF pdf]
Swaroop Ghosh, Swarup Bhunia, Arijit Raychowdhury and Kaushik Roy, "A Novel Delay Fault Testing Methodology Using Low Overhead Built-In Delay Sensor", IEEE Trans. on Computer Aided Design of Integrated Circuits and Systems, vol. 25, no. 12, pp. 2934-2943, Dec. 2006. [Abstract] [Full Text: PDF pdf]
Animesh Datta, Swarup Bhunia, Saibal Mukhopadhyay and Kaushik Roy, "Delay Modeling and Statistical Design of Pipelined Circuit under Process Variation", IEEE Trans. on Computer Aided Design of Integrated Circuits and Systems, vol. 25, no. 11, pp. 2427-2436, Nov. 2006. [Abstract] [Full Text: PDF pdf]
Saibal Mukhopadhyay, Swarup Bhunia and Kaushik Roy, “Modeling and Analysis of Loading Effect on Leakage of Nanoscaled Bulk-CMOS Logic Circuits”, IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems, vol. 25, no.8, pp. 1486-1495, 2006. [Abstract] [Full Text: PDF pdf]
2005
Arijit Raychowdhury, Bipul Paul, Swarup Bhunia and Kaushik Roy, “Computing with Sub-threshold Leakage: Device/Circuit/Architecture Co-design for Ultralow-power Subthreshold Operation”, IEEE Transactions on Very Large Scale Integration Systems (TVLSI), vol. 13, no. 11, pp. 1213-1224, 2005. [Abstract] [Full Text: PDF pdf]
Qikai Chen, Hamid Mahmoodi, Swarup Bhunia and Kaushik Roy, “Efficient testing of SRAM with optimized March sequences and a Novel DFT Technique for emerging failures due to process variations”, IEEE Transactions on Very Large Scale Integration Systems (TVLSI), vol. 13, no. 11, pp. 1286-1295, 2005. [Abstract] [Full Text: PDF pdf]
Swarup Bhunia and Kaushik Roy, “A novel wavelet transform-based transient current analysis for fault detection and localization”, IEEE Transactions on Very Large Scale Integration Systems (TVLSI), vol. 13, no. 4, pp. 503-507, 2005. [Abstract] [Full Text: PDF pdf]
Swarup Bhunia, Animesh Datta, Nilanjan Banerjee and Kaushik Roy, “GAARP: A Power-Aware GALS Architecture for Real-Time Algorithm-Specific Tasks”, IEEE Transactions on Computers (TC), vol. 54, no. 6, pp. 752-766, 2005. [Abstract] [Full Text: PDF pdf]
Swarup Bhunia, Hamid Mahmoodi, Saibal Mukhopadhyay, Debjyoti Ghosh and Kaushik Roy, “Low-Power Scan Design Using First Level Supply Gating”, IEEE Transactions on Very Large Scale Integration Systems (TVLSI), vol. 13, no. 3, pp. 384-395, 2005. [Abstract] [Full Text: PDF pdf]
Swarup Bhunia, Arijit Roychowdhury and Kaushik Roy, “Frequency Specification Testing of Analog Filters Using Wavelet Transform of Dynamic Supply Current”, Journal of Electronic Testing: Theory and Applications (JETTA), vol. 21, no. 3, pp. 243-255, 2005. [Abstract] [Full Text: PDF pdf]
Lih-yih Chiou, Swarup Bhunia and Kaushik Roy, “Synthesis of Application-Specific Highly Efficient Multi-Mode Cores for Embedded Systems”, ACM transactions on Embedded Computing System (TECS), vol. 4, no. 1, pp. 168-188, 2005. [Abstract] [Full Text: PDF pdf]
Swarup Bhunia, Arijit Raychowdhury and Kaushik Roy, “Defect Oriented Testing of Analog Circuits Using Wavelet Analysis of Dynamic Supply Current”, Journal of Electronic Testing: Theory and Applications (JETTA), vol. 21, no. 2, pp. 147-159, 2005. [Abstract] [Full Text: PDF pdf]
2004
Hai Li, Swarup Bhunia, Yiran Chen, Kaushik Roy and T. N. Vijaykumar, “DCG: Deterministic Clock-Gating for Low-Power Microprocessor Design”, IEEE Transactions on Very Large Scale Integration Systems (TVLSI), vol. 12, no. 3, pp. 245-254, 2004. [Abstract] [Full Text: PDF pdf]